1. Field of the Invention
This invention relates generally to voltage regulators.
2. Description of the Related Art
A regulated voltage is often required in an integrated circuit (IC). In some instances, a variable current is provided to a voltage regulator circuit within the IC, which must be designed to absorb variations in the current while providing a regulated voltage that does not vary as a function of current or, ideally, temperature.
One such regulator is shown in FIG. 1, which was described in R. J. Widlar, “New Developments in IC Voltage Regulators”, IEEE International Solid-State Circuits Conference (1970), p. 158. The regulator is driven with a supply current I. Transistor Qa is operated at a higher current density than transistor Qb, with the differential between the base-emitter voltages of Qa and Qb (ΔVBE) appearing across resistor Rc; ΔVBE will increase with increasing temperature, therefore making it proportional-to-absolute-temperature (PTAT). If Qa and Qb have high current gains, the voltage across Rb will be proportional to ΔVBE, and thus also PTAT. Qc serves as a gain stage that regulates the output voltage Vref at a voltage equal to the drop across Rb, plus the emitter-base voltage of Qc, which is complementary-to-absolute-temperature (CTAT). That is:
      V    ref    =                    Rb                  Rc          ⁢                                                    ⁢      Δ      ⁢                          ⁢              V        BE              +          V              BE        ,        Qc            This equation can be shown to imply that Vref will be temperature compensated when it is equal to the bandgap voltage of silicon extrapolated to 0° K. For the circuit shown in FIG. 1, Vref is equal to the bandgap voltage when Qa and Qb operate at a 10:1 current ratio.
This circuit does have some shortcomings, however. As shown, Vref is limited to a value no greater than the bandgap voltage. In addition, changes in I will change the current in Qc, as well as the currents in Qa and Qb, causing a small departure from the nominal Vref value.